STM32L562 — STM32L562E-DK
Board Overview
The STM32L562E-DK Discovery board extends L552 capabilities with hardware AES and an on-board Octa-SPI flash. This enables transparent on-the-fly decryption of enclaves via OTFDEC.
Key Characteristics
| Feature | Detail |
|---|---|
| MCU | STM32L562QEI6Q |
| Core | Cortex-M33, 110 MHz |
| Flash | 512 KB (2 x 256 KB banks) |
| SRAM | 256 KB |
| AES | Hardware AES engine at 0x520C0000 (AesHardware) |
| External Flash | MX25LM51245G 64 MB Octa-SPI (memory-mapped at 0x90000000) |
| OTFDEC | On-The-Fly Decryption engine, 4 configurable regions |
| Debug UART | USART1 (PA9 TX, PA10 RX) via ST-Link VCP, 9600 baud |
| LED | PD3 (red) |
| Enclave storage | External OCTOSPI flash |
| Block loading | CPU copy from memory-mapped OCTOSPI (OTFDEC decrypts transparently) |
OTFDEC Operation
On the L562, enclave blocks are stored encrypted in external flash. The boot sequence:
- Loads plaintext enclave blob to OCTOSPI via external loader
- Uses OTFDEC in ENC mode to encrypt and write back to flash
- Switches OTFDEC to DEC mode for runtime
- Memory-mapped reads from
0x90000000return decrypted data transparently
This means the CPU never sees ciphertext during normal operation — OTFDEC is a bus-level transform.
OCTOSPI Pin Assignment
| Pin | Function | Alternate Function |
|---|---|---|
| PA2 | NCS | AF10 |
| PA3 | CLK | AF10 |
| PA6 | IO3 | AF10 |
| PA7 | IO2 | AF10 |
| PB0 | IO1 | AF10 |
| PB1 | IO0 | AF10 |
| PB2 | DQS | AF10 |
| PC0 | IO4 | AF10 |
| PC1 | IO5 | AF10 |
| PC2 | IO6 | AF10 |
| PC3 | IO7 | AF10 |